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Wirnet™ iBTS Semtech HALv2 v5.1.0 - Instructions

HAL

Prerequisites

Required packages / tools to build the HALv2:

build-essential
tar
opkg-build

Please ensure that these files are in the $PATH.

opkg-build opkg-build can be install by using this one-liner:

wget -qO- https://git.yoctoproject.org/cgit/cgit.cgi/opkg-utils/plain/opkg-build \
> | sudo tee /usr/local/bin/opkg-build && sudo chmod 755 /usr/local/bin/opkg-build

Compilation

To compile the HALv2, please use following commands:

tar xzf libloragw2-5.1.0-klk1.tar.gz
cd libloragw2_5.1.0-klk1
source /opt/toolchains/lpbs/environment-setup-cortexa9hf-neon-poky-linux-gnueabi
./configure --host=arm-poky-linux-gnueabi --prefix=/user/libloragw2

This should show something similar to:

checking for...
...
configure: creating ./config.status
config.status: creating ...
config.status: executing depfiles commands

Check that there is no errors. Then, compile the tools:

make
make ipk # this is optional and generates the ipk required to upgrade the FPGA to v61

Usage

The main modification in tools since HALv1 is the -d argument.

As this HAL is mainly designed to handle multiple RF chips, this optional argument allows to specify which SPI device to use.

Kerlink provides an automatic discovery script at startup to handle correctly plugged boards.

By default, if a WAN module is provided, loraloc modules are mapped from slot 2.

So to use tools with this Loraloc module, please specify on tool's command-line -d /dev/slot/2/spidev0.

For example:

./pkt_logger -d /dev/slot/2/spidev0

Configuration

Due to architecture, the configuration is quite more complex than HAL v1:

board keyword means “Loraloc board” or “LoraLoc module” (one “board” by slot)
each board includes 2 chip configs (i.e. sx1301 configs)
each board includes 2 rfchain configs

Chip config

This configuration must include SX1301 channel config.

These channels can be configured through sx1301ar_conf_chan function.

Please note that this function takes as “channel number” the concatenation of chip number and channel. (see function description in sx1301ar_hal.h)

RF Chain config

This configuration is mainly used to correct RSSI and TX power values.

Corresponding calibration values are set in Production by Kerlink and extracted during board startup in /tmp/calib_loraloc.json file.

Thanks to ad9361 transceiver chip. We are able to get +-0.25 dBm precision on real TX power.

As a consequence, up to 32 power steps (tx_lut) are generated and calibrated in production.

JSON Config

The JSON configuration file has been improved to simplify software by using JSON tables.

Indeed:

The main Radio config object SX1301_array_conf is now a table to support multiple boards
rf_chain_conf is also a 2-objects-sized table
SX1301_conf is a 2-objects-sized table
tx_lut is a variable table (up to 32 objects)

Tools

Semtech provide a set of tools in order to process tests on hardware components.

chip_id: Retrieves the FPGA_CID of the board in order to ask AES key to Semtech.
pkt_logger: Logs packet emitted by the packet forwarder.
klk_spectral_scan: Scans the spectral band (using Kerlink RF chain).
lbt_test: Tests the LBT channel availability.
send_pkt: Sends packet to the concentrator.
spectral_scan: Scans the spectral band (using Semtech RF chain).
tx_continuous: Configure the concentrator in continuous mode.

Compilation

source /opt/toolchains/lpbs/environment-setup-cortexa9hf-neon-poky-linux-gnueabi
tar xzf libloragw2-5.1.0-klk1.tar.gz
./configure --host=arm-poky-linux-gnueabi

make util
...
  GEN          util_lib_loragw2_5.1.0-klk1.tar.gz

Archive can now be sent to an Wirnet™ iBTS gateway to be extracted and used.

Installation

Send archive on Wirnet™ iBTS: scp util_lib_loragw2_5.1.0-klk1.tar.gz root@<iBTS_IP>:/user
Extract tar.gz archive on /user directory: tar -xf util_lib_loragw2_5.1.0-klk1.tar.gz
Display the folder to check its content:

root@<iBTS_IP>:/ # ll /user/util_libloragw2_5.1.0-klk1
drwxr-xr-x    2 root     root        4.0K Jan 23 08:33 .
drwxr-xr-x    7 root     root        4.0K Jan 23 08:33 ..
-rwxr-xr-x    1 root     root      379.8K Jan 22 16:28 chip_id
-rw-r--r--    1 root     root        3.0K Jan 22 16:28 config.json
-rw-r--r--    1 root     root        9.1K Jan 22 16:28 config_64ch.json
-rw-r--r--    1 root     root        1.6K Jan 22 16:28 config_calib_prod.json
-rwxr-xr-x    1 root     root      405.3K Jan 22 16:28 klk_spectral_scan
-rwxr-xr-x    1 root     root      166.7K Jan 22 16:28 lbt_test
-rwxr-xr-x    1 root     root      545.7K Jan 22 16:28 pkt_logger
-rwxr-xr-x    1 root     root      489.0K Jan 22 16:28 send_pkt
-rwxr-xr-x    1 root     root      386.3K Jan 22 16:28 spectral_scan
-rwxr-xr-x    1 root     root      508.3K Jan 22 16:28 tx_continuous

Examples

chip_id

usage

This software provides FPGA chip ID.

Command to run: ./chip_id -d <SPI bus location>
Action to stop: program stops itself.
Output : on shell.

Parameter	Value	Type	Description
-d	/dev/slot/N/spidevY	<int>	SPI device address. N: slot number. Y:spidev number.
-h	NA	NA	Displays help menu.

example

./chip_id -d /dev/slot/1/spidev0
INFO: SPI speed set to 1000000 Hz
INFO: board MASTER
CHIP ID (LSB): 0x28750914
CHIP ID (MSB): 0x00f14086

pkt_logger

usage

This program is used to configure a concentrator based on the Semtech 'SX1301 array' architecture based on a JSON configuration file, and then record all the packets received in log files, indefinitely, until the user stops the program.

No filtering is done and all the packets received by the concentrator should appear in the log.

Command to run: ./pkt_logger -d <SPI bus location>
Action to stop: Ctrl+C.
Output : create a csv file with all the packets received.

Parameter	Value	Type	Description
-d	/dev/slot/N/spidevY	<int>	SPI device address. N: slot number. Y:spidev number.
-h	NA	NA	Displays help menu.

example

./pkt_logger -d /dev/slot/1/spidev0
+++ Start of packet logger for 'SX1301 array' concentrator +++
SX1301 array library version string: 5.1.0-klk1
INFO: SPI speed set to 1000000 Hz
INFO: found configuration file config.json
INFO: parsing concentrator parameters for board #0
INFO: Master board
INFO: board center frequency configured at 866500000 Hz
INFO: board RX bandwidth configured at 7000000 Hz
INFO: rf_chain 0: RSSI offset configured at -202.5, a=20, b=2925
INFO: rf_chain 1: RSSI offset configured at -202.5, a=20, b=2925
INFO: gateway AES-128 key is configured to ABCDEF0123456789ABCDEF0123456789
INFO: Calibration room temperature (Tref) set to 22 oC
INFO: Calibration radio temperature code at [Tref] set to 77
INFO: 1 dsp on the board
INFO: chip 0 enabled
INFO: chip 0 center frequency configured at 868000000 Hz
INFO: LoRa multi-SF channel 0x00 configured at 867100000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x01 configured at 867300000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x02 configured at 867500000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x03 configured at 867700000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x04 configured at 867900000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x05 configured at 868100000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x06 configured at 868300000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x07 configured at 868500000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa stand-alone channel 0x08 configured at 868300000 Hz, BW 250000 Hz, SF 7
INFO: FSK channel 0x09 configured at 868800000 Hz, BW 125000 Hz, bit rate 50000
INFO: chip 1 enabled
INFO: chip 1 center frequency configured at 868000000 Hz
INFO: LoRa multi-SF channel 0x10 configured at 867100000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x11 configured at 867300000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x12 configured at 867500000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x13 configured at 867700000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x14 configured at 867900000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x15 configured at 868100000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x16 configured at 868300000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa multi-SF channel 0x17 configured at 868500000 Hz, BW 125kHz, SF 7 to 12
INFO: LoRa stand-alone channel 0x18 configured at 868300000 Hz, BW 250000 Hz, SF 7
INFO: FSK channel 0x19 configured at 868800000 Hz, BW 125000 Hz, bit rate 50000
INFO: parsing gateway parameters
INFO: gateway MAC address is configured to 00AEAEFFFE000000
Configuring radio...
Configuring DSP...
INFO: [BRD0] enabling chip 0
INFO: [BRD0] enabling chip 1
INFO: [BRD0] channel diversity table: { 1 1 1 1 1 1 1 1 1 1 }
--> board 0 started
INFO: concentrator started
INFO: Now writing to log file pktlog_00AEAEFFFE000000_20171023T090038Z.csv
INFO: log file will be rotated every 3600 seconds

klk_spectral_scan

This software starts a scan from 863 MHz to 870 MHz by step of 0.2 MHz with 1024 samples by frequency scan. This will be recorded in an output file named “scan.csv”.

usage

Command to run: ./klk_spectral_scan -d <SPI bus location>
Action to stop: program stops itself.
Output : create a csv file with scan values registered.

Parameter	Value	Type	Description
-d	/dev/slot/N/spidevY	<int>	SPI device address. N: slot number. Y:spidev number.
-f	fstart:fstep:fstop	<float>:<float>:<float>	Frequency values to run the test.
-h	NA	NA	Displays help menu.

example

./klk_spectral_scan -d /dev/slot/1/spidev0
I/ Serial port : /dev/ttyACM0
I/ Start frequency: 863000000 Hz
I/ Stop frequency: 870000000 Hz
I/ Step frequency: 200000 Hz
I/ RSSI samples: 1024
I/ Bandwidth: 200000 Hz
I/ Bit rate: 600 bps
I/ Radio: 0
I/ Output filename: scan.csv

lbt_test

usage

This software configures the FPGA for “Listen-Before-Talk” feature and continuously reads the LBT channels timestamps which indicate when was the last instant when the channel was free.

Command to run: ./lbt_test <Parameters>
Action to stop: Ctrl+C

Parameter	Value	Type	Description
-c	868.3	<float>	Center frequency for the test.
-d	/dev/slot/N/spidevY	<int>	SPI device address. N: slot number. Y:spidev number.
-f	868.3	<float>	Selected frequency the test.
-n	1	<int>	Number of lbt channels enabled for the test.
-r	-80	<int>	RSSI target.
-s	128	<int>	Scan time in ms for an lbt channel.
-h	NA	NA	Displays help menu.

example

./lbt_test -d /dev/slot/1/spidev0 -c 868.3 -f 868.3 -n 1 -r -80 -s 128
INFO: Starting LoRa Gateway v2 LBT test
INFO: SPI speed set to 1000000 Hz
INFO: FPGA VERSION = 61
INFO: Number of LBT channels: 1
INFO: RSSI target: -80dBm
INFO: Scan time: 0x0
INFO: LBT channel 00 frequency: 868.3 MHz
~~~~~~~~~~~~
TIMESTAMP = 15935398
TIMESTAMP_CH0 = 15935757

send_pkt

usage

This software is used to send test packets with a 'SX1301 array' concentrator.

Command to run: ./send_pkt -d <SPI bus location>
Action to stop: Ctrl+C

Parameter	Value	Type	Description
-d	/dev/slot/N/spidevY	<int>	SPI device address. N: slot number. Y:spidev number.
-a	0	<int>	RF chain (0 or 1).
-b	125	<int>	Bandwidth [125,250,500].
-s	7	<int>	Frequency values to run the test.
-t	1000	<int>	Pause between packets.
-p	2	<int>	RF power (dBm).
-f	868.3	<float>	Target frequency (MHz).
–rfreq	868.5	<float>	Radio RX central frequency.
-h	NA	NA	Displays help menu.

example

root@klk-lpbs-060FBE:/user/util_libloragw2_5.1.0-klk1 # ./send_pkt -d /dev/slot/2/spidev0 -a 0 -b 125 -s 7 -t 1000 -p 2 -f 868.3 --rfreq 868.5
debug: 1, 868.300000, 1000, 0.000000
+++ Start of packet sender for 'SX1301 array' concentrator +++
SX1301 array library version string: 5.1.0-klk1
INFO: SPI speed set to 1000000 Hz
Configuring radio...
Configuring DSP...
INFO: [BRD0] enabling chip 0
INFO: [BRD0] enabling chip 1
INFO: [BRD0] channel diversity table: { 0 0 0 0 0 0 0 0 0 0 }
--> board 0 started
INFO: concentrator started
NOTE: emitting on 36 channel starting at @868.300MHz with 0.200MHz offset
NOTE: Concentrator board configuration:
  Radio configuration: RX center freq 868500000 Hz, RX bandwidth 7000000 Hz
  non-LoRaWAN, or private network mode
  LoRa modulation, BW 125kHz, SF 7, CR 1, normal polarity
  +2dBm TX power, 32 bytes payload, default preamble length
XX^C

spectral_scan

usage

This software is used to scan the spectral band where the Wirnet™ iBTS operates. It simply computes a RSSI histogram on several frequencies, that will help to detect occupied bands and get interferer profiles. It logs the histogram in a .csv file.

Command to run: ./spectral_scan -d <SPI bus location>
Action to stop: program stops itself.

Note: The concentrator must be started to run spectral_scan.

Parameter	Value	Type	Description
-d	/dev/slot/N/spidevY	<int>	SPI device address. N: slot number. Y:spidev number.
-f	fstart:fstep:fstop	<float>:<float>:<float>	Frequency values to run the test.
-l	scan.csv	<string>	File to store output data scan.
–rfreq	868.3	<int>	Radio RX central frequency.
-h	NA	NA	Displays help menu.

example

./spectral_scan -d /dev/slot/1/spidev0
+++ Start RSSI histogram of 'SX1301 array' channels +++
SX1301 array library version string: 5.1.0-klk1
INFO: SPI speed set to 1000000 Hz
FPGA version: 61
File : rssi_histogram.csv
Freq start : 863000000 Hz
Freq stop : 870000000 Hz
Freq step : 50000 Hz
Pts per step: 8192
Rate : 12500 Hz
RSSI offset : -143 dBm
Radio RX center frequency: 866500000 Hz
863000000
...
INFO: SPI link closed

tx_continuous

usage

This software is used to set Wirnet™ iBTS in Tx continuous mode, for spectral measurement. The user can set the modulation type, the modulation parameters, and the multiple gains of the Tx chain. The program runs indefinitely, until the user stops the application.

Command to run: ./tx_continuous -d /dev/slot/2/spidev0 -f 920.6
Action to stop: type q.

Parameter	Value	Type	Description
-c	868.3	<float>	Center frequency for the test.
-d	/dev/slot/N/spidevY	<int>	SPI device address. N: slot number. Y:spidev number.
-f	868.3	<float>	Selected frequency the test.

example

./tx_continuous -d /dev/slot/1/spidev0 -f 868.3
SX1301 array library version string: 5.1.0-klk1
RF frequency: 868.300 MHz (868300000 Hz)
RF path: 0
Modulation: LORA SF:7 BW:125 kHz
INFO: SPI speed set to 1000000 Hz
TX Gains: FPGA:5
TX Gains: AD9361: Atten:87, AuxDAC Vref:3, AuxDAC:770
TX Gains: AD9361 Temperature Compensation: Tref_code: 77, coeff_a:0, coeff_b:0
Configuring radio...
Configuring DSP...
INFO: [BRD0] enabling chip 0
INFO: [BRD0] channel diversity table: { 0 0 0 0 0 0 0 0 0 0 }
--> board 0 started
INFO: final atten used with temperature compensation is 87
running...
Enter "n<value>" to modify atten
Enter "d<value>" to modify auxdac_word value
Enter "a<value>" to modify temperature compensation coeff A
Enter "b<value>" to modify temperature compensation coeff B
Enter "q" to quit
q
INFO: concentrator stopped
INFO: SPI link closed

Wirnet™ i-series

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Table of Contents

Wirnet™ iBTS Semtech HALv2 v5.1.0 - Instructions

HAL

Prerequisites

Compilation

Usage

Configuration

Chip config

RF Chain config

JSON Config

Tools

Compilation

Installation

Examples

chip_id

usage

example

pkt_logger

usage

example

klk_spectral_scan

usage

example

lbt_test

usage

example

send_pkt

usage

example

spectral_scan

usage

example

tx_continuous

usage

example

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Table of Contents

Wirnet™ iBTS Semtech HALv2 v5.1.0 - Instructions

HAL

Prerequisites

Compilation

Usage

Configuration

Chip config

RF Chain config

JSON Config

Tools

Compilation

Installation

Examples

chip_id

usage

example

pkt_logger

usage

example

klk_spectral_scan

usage

example

lbt_test

usage

example

send_pkt

usage

example

spectral_scan

usage

example

tx_continuous

usage

example

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